STRUCT IRQ_CHIP_GENE(9) | Structures | STRUCT IRQ_CHIP_GENE(9) |
NAME¶
struct_irq_chip_generic - Generic irq chip data structure
SYNOPSIS¶
struct irq_chip_generic {
raw_spinlock_t lock;
void __iomem * reg_base;
u32 (* reg_readl) (void __iomem *addr);
void (* reg_writel) (u32 val, void __iomem *addr);
void (* suspend) (struct irq_chip_generic *gc);
void (* resume) (struct irq_chip_generic *gc);
unsigned int irq_base;
unsigned int irq_cnt;
u32 mask_cache;
u32 type_cache;
u32 polarity_cache;
u32 wake_enabled;
u32 wake_active;
unsigned int num_ct;
void * private;
unsigned long installed;
unsigned long unused;
struct irq_domain * domain;
struct list_head list;
struct irq_chip_type chip_types[0]; };
MEMBERS¶
raw_spinlock_t lock
void __iomem * reg_base
u32 (*)(void __iomem *addr) reg_readl
void (*)(u32 val, void __iomem *addr) reg_writel
void (*)(struct irq_chip_generic *gc) suspend
void (*)(struct irq_chip_generic *gc) resume
unsigned int irq_base
unsigned int irq_cnt
u32 mask_cache
u32 type_cache
u32 polarity_cache
u32 wake_enabled
u32 wake_active
unsigned int num_ct
void * private
unsigned long installed
unsigned long unused
struct irq_domain * domain
struct list_head list
struct irq_chip_type chip_types[0]
DESCRIPTION¶
Note, that irq_chip_generic can have multiple irq_chip_type implementations which can be associated to a particular irq line of an irq_chip_generic instance. That allows to share and protect state in an irq_chip_generic instance when we need to implement different flow mechanisms (level/edge) for it.
AUTHORS¶
Thomas Gleixner <tglx@linutronix.de>
Ingo Molnar <mingo@elte.hu>
COPYRIGHT¶
June 2017 | Kernel Hackers Manual 4.11 |